Vendor Strategy Summary
Key Strategic Signals
View AllTSMC Pledges $100B More for 6 US Fabs, Localizing 3nm for AI Chip Supply Chain
TSMC announces an additional $100B investment in Arizona, bringing total US commitment to $265B, with plans for 6 fabs f...
TSMC Hikes Sub-7nm Prices 8-12%, Extends Lead Times to 26 Weeks, Triggering AI Chip Cost Inflation
TSMC raises sub-7nm wafer prices by 8-12% and extends lead times to 26 weeks, effective July 2026. New v2.1 directive ma...
TSMC CoWoS Capacity to Reach 200k Wafers by 2027, Diversifying from GPU to CPU and ASIC
TSMC targets 200k wpm CoWoS capacity by 2027, narrowing supply-demand gap from 20% to 10%. Customer base diversifies fro...
Recent Signals
View All IntelligenceTSMC Ramps PIC Capacity to 25K Wafers, CPO Silicon Photonics Poised to Disrupt AI Interconnects
TSMC plans to expand its PIC capacity to 25,000 wafers per month by 2028, with its COUPE platform be...
Etched Unveils Sohu Transformer ASIC: Claims 20x H100 Inference Throughput, Challenging NVIDIA's Grip
AI chip startup Etched emerges from stealth with Sohu, a Transformer-specific ASIC on TSMC N4P with ...
TSMC, ASML, imec Demonstrate 300mm 2D Material CMOS with 50nm CPP, 94% Yield
TSMC, ASML, and imec jointly demonstrated the first 300mm wafer-scale integration of 2D material tra...
TSMC Adds Winbond to WoW 3D Stacking Memory Supply, Breaking DRAM Oligopoly
Winbond joins TSMC's Wafer-on-Wafer (WoW) 3D stacking advanced packaging supply chain, becoming a ne...
TSMC Bets on CoPoS and Glass Substrates: Packaging Paradigm Shifts from Wafer-Level to Panel-Level, AI Chip TCO Inflection
TSMC is replacing CoWoS with CoPoS (panel-level packaging), using 750x620mm square panels and glass ...
TSMC under triple pressure: customer diversification, patent challenges, and EUV strategy shift
TSMC faces operational, legal, and commercial pressures: Google splits Icefish AI chip production wi...
TSMC Capacity Crunch Reshapes Foundry Landscape: Google, AMD, Tesla Move to Samsung for Advanced Nodes
TSMC's advanced capacity shortage through 2027 pushes Google, AMD, and Tesla to Samsung for 3nm/2nm ...
TSMC Accelerates Glass Substrate CoWoS with Japanese and Taiwan Partners
TSMC partners with Ibiden and Innolux to develop glass substrates for next-gen CoWoS packaging. Simu...
TSMC Reveals Glass Substrate Plan for CoWoS, Marking Packaging Inflection
TSMC publicly disclosed its glass substrate development plan for CoWoS, partnering with Ibiden and I...
TSMC Discloses Glass Substrate Pilot, Packaging Paradigm Shifts
TSMC, with Ibiden and Innolux, publicly discloses glass substrate integration into CoWoS for advance...
Related Analysis
TSMC's Additional $100 Billion Arizona Bet: The 'Made in USA' Gamble for AI Infrastructure
TSMC reported Q2 results on July 16: $40.2B revenue, 77.4% net income growth, 67...
Read Analysis →AMD-OpenAI 6GW Historic AI Chip Agreement: Birth of the AI Compute Closed-Loop Economy and Systemic Risks
On July 16, 2026, AMD and OpenAI signed a historic 6GW compute supply agreement ...
Read Analysis →TSMC Q2 2026 Earnings and AI Compute Supply-Side Confirmation: Five Consecutive Quarterly Highs Reshape Semiconductor Pricing Power
On July 13, 2026, TSMC announced June single-month revenue of NT$442.68B (~$13.8...
Read Analysis →