Reports
AI-generated structured vendor updates
AMD Unveils Zen 6/7 CPU and MI400/500 GPU Roadmap, Targets NVIDIA Rubin with HBM4 and 2nm
AMD unveiled its Zen 6/7 CPU and MI400/500 GPU roadmap at its 2026 Financial Analyst Day, featuring TSMC 2nm process and HBM4 memory. The MI400 series boasts 432GB memory, 19.6TB/s bandwidth, and 40 PFLOPs FP4 performance, directly targeting NVIDIA's Vera Rubin architecture with an annual cadence to disrupt the AI hardware monopoly.
NVIDIA Vera Rubin AI Platform Slated for July 2026 Shipments, Iterative Compute Upgrade
NVIDIA confirms its next-gen AI compute platform, Vera Rubin, will start shipping in July 2026 to major cloud providers like Microsoft and Google. The platform uses an advanced process node to boost AI training and inference performance, representing an iterative upgrade over Hopper and Blackwell without a fundamental architectural shift.
Meta Shifts MTIA ASIC to Samsung 2nm: Ecosystem Restructuring in AI Chip Fab
Meta partners with Samsung for next-gen MTIA ASIC production, moving from TSMC to Samsung 2nm node. Targeting hundreds of thousands of units to support 5GW data center goal by 2030, with new chip every six months, restructuring the AI chip supply chain ecosystem.
Samsung Restarts 1.4nm Foundry Node, Pre-emptively Locks Equipment Supply Chain
Samsung Electronics restarts 1.4nm (SF1.4) process commercialization, ordering equipment vendors to develop tools early. The node will use High-NA EUV lithography and GAA transistors, fabbed at NRD-K campus. This move aims to catch up with TSMC and Intel, but mass production timeline remains undisclosed.
Etched Unveils Sohu Transformer ASIC: Claims 20x H100 Inference Throughput, Challenging NVIDIA's Grip
AI chip startup Etched emerges from stealth with Sohu, a Transformer-specific ASIC on TSMC N4P with 144GB HBM3E. By hardwiring attention mechanisms, it claims 20x throughput and 140x price-performance vs. H100 on Llama 70B. With $800M total funding and first racks shipping this summer, it directly challenges NVIDIA's inference dominance.
OpenAI and Broadcom launch Jalapeño inference ASIC: 9-month tapeout, 2027 mass production, targets GPU replacement
OpenAI and Broadcom unveil Jalapeño, a custom inference ASIC designed in 9 months using OpenAI's own LLMs. Early benchmarks show superior performance-per-watt vs. current GPUs. Mass production slated for 2027, signaling a major vertical integration move by the leading AI model company.
Samsung Re-accelerates 1.4nm Node R&D, Adopts High-NA EUV Lithography
Samsung Electronics is re-accelerating its 1.4nm (SF1.4) process node R&D, targeting mass production by 2028-2029. It has procured High-NA EUV lithography equipment from ASML for its NRD-K R&D complex and ordered tools for 12th-gen V-NAND with wafer stacking. The move aims to catch up with TSMC and Intel in the AI chip foundry race.
TSMC, ASML, imec Demonstrate 300mm 2D Material CMOS with 50nm CPP, 94% Yield
TSMC, ASML, and imec jointly demonstrated the first 300mm wafer-scale integration of 2D material transistors at VLSI 2026, achieving 50nm contacted poly pitch (CPP) for MoS₂ nFET and WS₂/WSe₂ pFET with 28nm channel length and 94% yield, marking a critical step toward industrializing 2D semiconductors.
TSMC Adds Winbond to WoW 3D Stacking Memory Supply, Breaking DRAM Oligopoly
Winbond joins TSMC's Wafer-on-Wafer (WoW) 3D stacking advanced packaging supply chain, becoming a new DRAM wafer supplier alongside Samsung, SK Hynix, and Micron. This move reduces reliance on the three global DRAM giants and strengthens AI chip packaging supply resilience. Winbond provides DRAM wafers for vertical stacking with TSMC logic wafers, offering 8GB capacity and 256GB/s bandwidth via its CUBE solution.
Samsung and SK Hynix Announce $300B Investment to Dominate AI Memory and Foundry
Samsung and SK Hynix announce a 10-year, 1,000 trillion won investment plan to expand HBM4 production, improve 3nm GAA yield, and build new AI chip fabs. This aims to cement their HBM duopoly and close the gap with TSMC in advanced foundry, reshaping global AI infrastructure supply chain costs.
TSMC Bets on CoPoS and Glass Substrates: Packaging Paradigm Shifts from Wafer-Level to Panel-Level, AI Chip TCO Inflection
TSMC is replacing CoWoS with CoPoS (panel-level packaging), using 750x620mm square panels and glass core substrates, achieving 20-30% unit area cost reduction. Volume production targets 2028, with AMD Zen 7 as first key customer. This fundamentally alters AI chip packaging economics and capacity scaling.
Google TPU v9 Switches to MediaTek, Breaking Broadcom's AI ASIC Monopoly
Google moves its TPU v9 Humufish design and integration contract from Broadcom to MediaTek, which handles I/O chip design and packaging. Combined with a split-foundry strategy (TSMC N2 compute, Samsung 2nm I/O), this marks a systematic effort to build a multi-vendor, multi-node supply chain, directly dismantling Broadcom's dominance in custom AI ASICs.
Arm's Self-Designed AGI CPU with Meta: Ecosystem Shift from Licensor to Silicon Vendor
Arm unveils its first self-designed data center CPU, the AGI CPU, with 136 cores on 3nm, purpose-built for agentic AI inference. Co-developed with Meta, which will deploy it across its data centers. Claims 2x rack performance over x86, reducing AI capex by $100B per gigawatt. Signals Arm's shift from IP licensing to direct silicon sales, reshaping ecosystem dynamics.
Apple Expands Private Cloud Compute to Google Cloud with NVIDIA Confidential GPUs
Apple at WWDC 2026 expands Private Cloud Compute (PCC) to Google Cloud, leveraging NVIDIA GPU Confidential Computing for secure AI inference. This marks a strategic shift from Apple-owned data centers to third-party cloud, alongside M6 Neural Engine performance gains.
Arm AGI CPU Demand Doubles, Targets AI Inference Control, Threatens x86 Dominance
Arm doubled its demand forecast for its first in-house datacenter CPU, the AGI CPU, projecting over $2B revenue in FY2027-2028. The 136-core, 3nm Neoverse V3-based chip targets agentic AI inference, claiming 2x rack-level performance over x86. Meta is a key partner; OpenAI, Cloudflare also onboard. This marks Arm's strategic pivot from IP licensor to direct silicon vendor.
TSMC under triple pressure: customer diversification, patent challenges, and EUV strategy shift
TSMC faces operational, legal, and commercial pressures: Google splits Icefish AI chip production with Samsung, US ITC patent probe risks import bans, and resource bottlenecks (labor, water, power) limit expansion. TSMC confirms it will skip high-NA EUV until 2029, using multi-patterning on low-NA EUV for 2nm, saving $5-10B.
Samsung 3nm GAA Yield Hits 80%, Lands Nvidia Order: TSMC Monopoly Challenged
Samsung Electronics announced its 3nm GAA process yield has exceeded 80%, securing orders from Nvidia for mid-range GPUs. This milestone marks the commercialization of Samsung's SF3 technology, aiming to reduce Nvidia's reliance on TSMC.
Arm Doubles AGI CPU Revenue Target, Signaling Pivot from IP Licensor to Direct Silicon Competitor
Arm reported record FY2026 revenue of $4.92B and doubled its AGI CPU revenue forecast to over $2B by 2028. The 136-core, 3nm, 300W processor, co-developed with Meta, targets AI Agent workloads and has attracted OpenAI and major hyperscalers. This marks Arm's strategic shift from IP licensing to direct silicon competition, triggering FTC antitrust scrutiny.
TSMC Capacity Crunch Reshapes Foundry Landscape: Google, AMD, Tesla Move to Samsung for Advanced Nodes
TSMC's advanced capacity shortage through 2027 pushes Google, AMD, and Tesla to Samsung for 3nm/2nm foundry services. Samsung's 6.5% market share may see structural growth, shifting global chip supply from single-source to multi-source, though yield and trust issues persist.
TSMC Accelerates Glass Substrate CoWoS with Japanese and Taiwan Partners
TSMC partners with Ibiden and Innolux to develop glass substrates for next-gen CoWoS packaging. Simulation shows 16% warpage improvement, 27% resistance reduction, targeting AI chip performance and reliability amid competition from Intel and Samsung.