MediaTek targets Google TPU v10 and Meta AI ASIC orders with 400G SerDes
Summary
Key Takeaways
MediaTek CEO Cai Lixing revealed that the company's 400G/448Gbps high-speed serial interface (SerDes) development is on track, expected to be ready by H2 2027. This is seen as a key ticket for MediaTek to compete for Google's TPU v10 and Meta's next-generation AI custom chip (ASIC) orders. MediaTek's first AI custom chip is expected to mass-produce in Q4 2024, with a second chip planned for early 2028, and it has raised its ASIC market share target to 15-20% by 2027.
Beyond 2nm mobile SoCs, MediaTek also plans to develop data center AI custom chips using 2nm process. Supply chain sources indicate that MediaTek, leveraging 336Gbps high-speed interfaces, advanced packaging, and TSMC integration, has secured major orders for Google's TPU v9, expected to mass-produce in early 2028. The next-generation TPU v10 will upgrade to 400G/448Gbps high-speed interfaces.
Meta currently collaborates mainly with Broadcom on multiple MTIA chips. Industry analysis suggests Meta favors a multi-vendor chip strategy. Once MediaTek completes 400G high-speed interface development and integrates CPO (Co-Packaged Optics) and advanced packaging, it could enter post-2027 projects as a second supplier.
Why It Matters
MediaTek's move is ostensibly a technological breakthrough but essentially a defensive strategy against Broadcom in the AI custom chip market, aiming to encircle Google and Meta's supply chain. By offering 400G SerDes and CPO integration, MediaTek seeks to lock customers into its interface IP and packaging design, though hyperscalers will maintain multi-sourcing to mitigate risk. The original text downplays the power consumption and signal integrity challenges of 400G SerDes in mass production, as well as the immaturity of CPO technology, potentially leading to cost traps. For AI workloads, merely increasing interconnect bandwidth does not solve tail latency and congestion control issues; MediaTek must demonstrate end-to-end system optimization, not just interface speed.
PRO Decision
【Vendors: Broadcom】Broadcom should emphasize its first-mover advantage and mass production experience in 400G SerDes and CPO, highlighting MediaTek's lack of system-level validation and reliability as a newcomer. It should accelerate deep binding with Google and Meta by offering a more complete AI chip platform rather than single interface IP.
【Enterprises: Hyperscalers like Google and Meta】CIOs and architects should conduct zero-trust technical audits, requiring MediaTek to provide independent benchmark tests for 400G SerDes, including power consumption, BER, and eye margin. They should evaluate CPO maintainability and supply chain maturity, while maintaining a multi-vendor strategy to avoid dependence on MediaTek's interface technology.
【Investors】Investors should see through MediaTek's PR rhetoric: the entry into AI ASIC is a strategic pivot but faces fierce competition from Broadcom and Marvell, with high R&D risk for 400G SerDes and 2nm tape-out costs. Short-term stock may be boosted, but focus on actual mass production progress and customer order wins in 2027.
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