Reports
AI-generated structured vendor updates
NVIDIA Demonstrates AI Factories as Flexible Grid Assets for Peak Demand Management
NVIDIA, in collaboration with EPRI, National Grid, and Emerald AI, demonstrated how AI factories powered by Blackwell GPU clusters can dynamically adjust power consumption in response to grid signals. This allows them to act as 'shock absorbers' during peak demand while maintaining performance for high-priority AI workloads.
ARM Builds Its First Chip in 35 Years: AGI CPU Targets AI Data Centers, Meta First Customer
ARM announces its first in-house CPU in 35 years, the AGI CPU, targeting AI and data center workloads. Meta is the launch customer. Built on TSMC's 3nm process, the chip focuses on performance-per-watt, directly challenging x86 dominance and fundamentally restructuring ARM's business model from IP licensor to merchant silicon vendor.
ARM Launches AGI CPU for Agentic AI Infrastructure Era
ARM introduces the Arm AGI CPU, its first silicon product, designed for agentic AI infrastructure on Neoverse. Optimized for massively parallel workloads, it supports 272 cores per blade in a 1OU design, delivering 8160 cores per rack and over 2x performance vs. x86 systems.
ARM Launches AGI CPU Silicon for AI Infrastructure Market
ARM introduced its first production AGI CPU silicon in March 2026, marking a strategic shift from IP licensing to full silicon solutions provider. Designed for next-gen AI infrastructure, this move may reshape the data center processor ecosystem.
Arm Neoverse Reshapes Control Layer in AI Infrastructure
ARM introduces Neoverse infrastructure CPU cores optimized for cloud, AI, and HPC workloads, adopted by NVIDIA, AWS, Microsoft, and Google for their AI platforms, delivering performance gains and energy efficiency. This architecture enables high-density AI workload deployment in cloud and edge environments with enhanced multi-tenant security.
ARM and NVIDIA Drive Localization Revolution in AI Workstations
ARM and NVIDIA jointly launch DGX Spark AI workstations based on GB10 Grace Blackwell chips, with eight major OEMs releasing products simultaneously. The solution features unified memory architecture supporting 200B parameter models locally, with third-party tests showing 41% faster rendering and 3.2x AI processing speed versus x86 alternatives, enabling seamless cloud-to-edge toolchain migration.
SK Hynix Jumps to TSMC 3nm for HBM4E Logic Die to Counter Samsung's 4nm Lead
SK Hynix plans to use TSMC's 3nm process for the logic die in its 7th-gen HBM4E, a leap from the 12nm used in HBM4. This aims to reverse the performance gap with Samsung (which used 4nm logic in HBM4) and deliver higher bandwidth and power efficiency for next-gen AI chips like NVIDIA's Vera Rubin Ultra.
AMD and NAVER Cloud Collaborate on Sovereign AI Infrastructure in Korea
AMD and NAVER Cloud announced a strategic collaboration to accelerate sovereign AI infrastructure in Korea. NAVER Cloud will expand deployment of AMD EPYC "Venice" CPUs and gain early access to next-gen Instinct MI455X GPUs, with joint optimization of AI services and software stacks on AMD platforms.
AMD and Samsung Deepen Collaboration, Locking HBM4 Supply and Exploring Foundry Partnership
AMD and Samsung signed an MOU, designating Samsung as the primary HBM4 supplier for the next-gen Instinct MI455X GPU and collaborating on DDR5 memory optimized for 6th Gen EPYC CPUs. The companies will also explore opportunities for Samsung to provide foundry services for future AMD products.
TSMC Launches Advanced Packaging Platform for Heterogeneous Integration
TSMC launches an advanced packaging platform integrating CoWoS, InFO, and SoIC 3D stacking technologies for micron-level vertical integration of chips across process nodes. It delivers higher interconnect density, bandwidth, and lower power consumption, supporting complex SoC designs as part of its Open Innovation Platform to accelerate time-to-market.
Cisco Launches G300 Chip and Systems for AI Agent-Era Data Center Networking
Cisco introduces 102.4Tbps Silicon One G300 switching chip with liquid-cooled N9000/8000 systems delivering 70% energy efficiency, 1.6T optics support, and Nexus One unified management plane upgrade.
ASML showcases holistic lithography solutions at SEMICON India, betting on India's chipmaking growth
At SEMICON India 2025, ASML showcased its lithography portfolio, including TWINSCAN NXE and EXE EUV systems for advanced logic and memory chip production. This move aims to support India's nascent semiconductor manufacturing ecosystem in response to government incentives.
Bosch and Qualcomm Deepen Collaboration to Consolidate ADAS and Cockpit Compute on Single SoC
Bosch and Qualcomm are expanding their strategic partnership to jointly develop production-ready ADAS solutions based on the Snapdragon Ride platform, and to consolidate cockpit and ADAS functions onto a single SoC using Snapdragon Ride Flex. This aims to provide automakers with a clear migration path from distributed to centralized compute architectures, reducing system complexity and cost.
Qualcomm and Snap Deepen Collaboration, Betting on XR Devices as New AI Computing Endpoints
Qualcomm and Snap's subsidiary, Specs Inc., have signed a multi-year strategic agreement to power future Specs smart glasses with Snapdragon XR platforms. The collaboration aims to establish a scalable foundation for developers to create more intelligent and private on-device AI experiences on eyewear. This move signifies an evolution of their long-term partnership from consumer AR glasses towards a platform emphasizing device-side AI agents and immersive computing.
Coherent Expands InP Fab with $50M CHIPS Grant, AI's Connectivity Bottleneck Drives Photonics Arms Race
Coherent receives $50M CHIPS Act grant to expand its 6-inch InP fab in Texas, quadrupling capacity. NVIDIA's $2B strategic investment and CEO Jensen Huang's presence signal a shift from GPU compute scaling to optical interconnect as the new AI infrastructure bottleneck.
NVIDIA Absorbs Groq LPU: Feynman GPU to Integrate SRAM Inference Tile, Hybrid Architecture by 2028
NVIDIA secures Groq's LPU inference technology via a non-exclusive license and key hires, planning to integrate large SRAM tiles into its 2028 Feynman GPU using TSMC SoIC hybrid bonding. This enables deterministic scheduling and 80TB/s on-chip bandwidth, shifting NVIDIA from a pure GPU vendor to a hybrid inference/training platform.