Reports
AI-generated structured vendor updates
AMD Helios Enters Production: 12-Stack HBM4 Outmuscles NVIDIA, UALoE Opens AI Network
AMD's second-generation Helios rack-scale AI server enters full production, featuring 72 MI455X GPUs with Samsung's exclusive 12-stack HBM4 (31TB per rack). Compared to NVIDIA's 8-stack design, it offers 50% more memory and 30% lower token cost. Microsoft Azure commits to large-scale deployment, solidifying hyperscaler dual-vendor strategy.
NVIDIA Prepay $1.5B to Amkor for US 2nm/3nm/HBM4 Advanced Packaging
NVIDIA prepays $1.5B to Amkor to expand advanced packaging capacity in Arizona, covering 2nm/3nm/HBM4. This onshores AI chip packaging, complementing Wistron's system integration, to reduce reliance on Taiwan and secure supply for Vera Rubin and Blackwell Ultra.
NVIDIA and Wistron Launch US-Based GB300 Production, Shifting AI Manufacturing Landscape
NVIDIA partnered with Wistron to open a $700M factory in Texas, achieving L6 integration of the GB300 Grace Blackwell Ultra system. The first US-made unit contains 1.5M parts, weighs 2 tons, and costs $4M. This milestone accelerates US AI capex localization from 5% to 30%, reshaping the global AI supply chain.
AMD Invests $5B in Anthropic, Secures 2GW MI450 Deployment, Reshaping AI Compute Ecosystem
AMD and Anthropic announce a strategic partnership: Anthropic will deploy up to 2GW of AMD Instinct MI450 GPUs, with AMD investing up to $5B in Anthropic. They will collaborate on ROCm optimization and Claude workload tuning, marking AMD's transition from chip vendor to AI ecosystem investor and accelerating multi-sourcing in AI compute.
Intel Foundry 18A Yields Jump to 85%+; EMIB Packaging Hits 98%, Challenging TSMC N2
Intel Foundry 18A yields surged from 65% to 85%+ in a single quarter, approaching TSMC N2's 90%. EMIB advanced packaging yields reached 90-98%, turning a former bottleneck into a selling point. NVIDIA, AMD, Apple signed on but mostly as secondary suppliers.
NVIDIA Denies Kyber NVL144 Delay, But 78-Layer PCB Bottleneck Exposes AI Hardware Physics Limit
NVIDIA officially denies reports of Kyber NVL144 rack delay to 2028, but SemiAnalysis revelations about a 78-layer ultra-high-density PCB midplane bottleneck and Rubin Ultra cancellation expose hard physical limits in signal integrity and manufacturing, opening a strategic window for AMD and Google.
Qualcomm HBC Gen 1 Stacks LPDDR to 133 TB/s, Challenging HBM Dominance
Qualcomm announces HBC Gen 1, a 3D-stacked LPDDR memory with integrated compute die, achieving 133 TB/s bandwidth and 6x energy efficiency over HBM. Aimed at replacing HBM in AI accelerators, shipping with AI250 in mid-2027, but supply chain and feasibility remain uncertain.
Qualcomm Dragonfly: 250-core CPU, HBC memory, UALink interconnects target AI inference TCO
Qualcomm unveils full data center portfolio: Dragonfly C1000 250-core Oryon CPU (>5GHz, PCIe Gen7, CXL), HBC near-memory compute (133TB/s Gen1, 18x-54x effective BW), AI300 inference accelerator (UALink/ESUN scale-up), and 800G/1.6T connectivity. Multi-year Meta CPU deal. Commercial sampling 2027-2028. Targets inference TCO with tokens-per-watt leadership.
OpenAI and Broadcom Unveil Jalapeno Inference ASIC, Reshaping AI Hardware Landscape
OpenAI, in collaboration with Broadcom, has developed Jalapeno, a custom LLM inference accelerator. The chip uses a multi-chip module with HBM3E memory and achieved tape-out in just nine months. Designed for OpenAI's model stack, it aims to reduce inference costs and dependency on NVIDIA GPUs, with initial deployment planned for late 2026.
China's LineShine Tops TOP500: CPU-Only 2.2 ExaFLOPS with ARMv9 and HBM Memory
LineShine supercomputer achieves 2.198 ExaFLOPS FP64 sustained using 13.79 million ARMv9 cores across 20,480 nodes, making it the first system to exceed 2 ExaFLOPS without GPUs. Each node has dual LX2 CPUs (304 cores) with 32GB HBM, demonstrating a CPU+HBM architecture breakthrough for HPC.
NVIDIA Unveils 45°C Liquid Cooling for Rubin Chips, Slashes Water Use 100%
NVIDIA announces a liquid cooling system for its Rubin GPUs running 45°C coolant (hotter than a hot tub), using dry coolers in a closed loop to cut electricity and eliminate water evaporation (100% reduction). However, chillers may still be needed in hot climates, and chip longevity impacts remain unaddressed.
NVIDIA's AI Agents and Digital Twins Reshape Telecom Network Control Plane
At DTW Ignite 2026, NVIDIA showcases its AI agent platform integrating NeMo synthetic data, NemoClaw secure runtime, OpenShell sandbox, and RTX PRO 6000-accelerated digital twins, aiming for autonomous telecom operations. Partners include SoftBank, Amdocs, NTT DATA, etc., moving from task automation to full autonomy.
ASML CEO Validates Musk's Terafab, Reshaping AI Chip Supply Chain
ASML's CEO publicly acknowledges tracking Elon Musk's planned terawatt-scale AI supercomputer Terafab, comparing it to Korean DRAM megaprojects. This signals that the sole EUV lithography supplier is allocating capacity, potentially transforming AI chip supply chain and vertical integration.
Micron-Anthropic Deal: Memory Co-Architecture Locks in AI Supply Chain
Micron and Anthropic sign a strategic agreement covering joint memory/storage architecture design, multi-year supply, Claude adoption, and investment. This ties frontier AI model demands directly to infrastructure design, aiming to optimize token economics and power efficiency, but essentially locks in supply and restructures the ecosystem.
Dell PowerEdge XE8812: Liquid-Cooled Density Trap with NVIDIA Vera Rubin NVL4
Dell launches PowerEdge XE8812 with NVIDIA Vera Rubin NVL4, delivering 144 GPUs per rack, 300kW+ power, and 100% direct liquid cooling. It offers a generational leap in memory and compute density for HPC and AI, but deeply locks users into Dell's PowerRack, iDRAC, and ORv3 ecosystem from chip to rack.
AMD MEXT Acquisition Turns NAND Flash into DRAM-Class Memory, Halving AI Inference Cost
AMD acquires MEXT, whose technology makes cheap NAND flash behave like expensive DRAM, doubling to quadrupling usable memory capacity while halving costs. This targets inference and agentic AI memory bottlenecks. AMD also signs a 30MW AI compute deployment deal with Rackspace, rolling out from 2026 to 2028.
Tesco's £100M Lawsuit Exposes VMware Lock-In, Accelerates Enterprise Virtualization Exodus
Tesco sues Broadcom over a 237% price hike after VMware's perpetual license termination, covering ~40,000 workloads. The case undermines enterprise trust in software licensing and may trigger a mass migration to Nutanix, Red Hat OpenShift Virtualization, and Proxmox, reshaping the virtualization ecosystem.
ASML CEO's EUV Supply Warning Signals a Physical Ceiling on AI Chip Expansion
ASML CEO Fouquet confirms talks with Musk on Terafab but stresses supply constraints. EUV lithography, the sole tool for advanced AI chips, cannot scale quickly. With TSMC, Samsung, Intel, and Musk all vying for limited machines, AI chip capacity allocation becomes a zero-sum game, capping the entire AI infrastructure buildout.
SiMa.ai Palette Neat: Natural-Language Agentic Environment Dismantles NVIDIA's GPU Moat
SiMa.ai launches open-source Palette Neat, an agentic development environment for Physical AI, paired with its sub-10W Modalix SoM. It uses natural language to abstract compute complexity, slashing dev cycles from months to days. Pin-compatible with NVIDIA SoM, it targets breaking the GPU ecosystem lock-in.
HBM Bottleneck Reshapes AI Infrastructure: Asian Memory Makers Gain Leverage Over Nvidia
SK Hynix, Samsung, and Micron have crossed $1 trillion market cap as HBM becomes the hard limit in AI infrastructure. Asian suppliers now account for 90% of Nvidia's production costs, shifting the bottleneck from GPU compute to stacked memory and advanced packaging.