Reports
AI-generated structured vendor updates
Qualcomm HBC Gen 1 Stacks LPDDR to 133 TB/s, Challenging HBM Dominance
Qualcomm announces HBC Gen 1, a 3D-stacked LPDDR memory with integrated compute die, achieving 133 TB/s bandwidth and 6x energy efficiency over HBM. Aimed at replacing HBM in AI accelerators, shipping with AI250 in mid-2027, but supply chain and feasibility remain uncertain.
Anthropic Alleges Largest AI Distillation Attack by Alibaba-Linked Operators, Exposing API Security Gaps
Anthropic alerted U.S. senators that Alibaba-linked operators conducted the largest known distillation attack, generating 28.8 million model exchanges via 25,000 fraudulent accounts to harvest Claude's frontier capabilities. The incident exposes a critical vulnerability in AI API security, forcing a rethinking of inference endpoint protection and usage monitoring.
Huawei Unveils AI-Centric Network with Token Monetization, UCM Caching Breaks Long-Context Barriers
At MWC Shanghai 2026, Huawei unveiled an AI-native network architecture integrating service, network, and compute, shifting from traffic-centric to intelligence-centric operations. The Unified Cache Manager (UCM) extends KV cache to petabyte-scale external storage, achieving 372% token throughput gains on GLM-5.1 at 128K sequence lengths. Token monetization frameworks and agentic operations enable carriers to charge for AI inference capacity and personalize services.
Google Cloud Multi-Agent Architecture Shifts Control from Human to Autonomous Verification
Google Cloud introduces agent-scale data management with multi-agent verification to reduce human oversight. Deploys six Gemini agents with Nokia for autonomous network operations. Amazon plans to commercialize Trainium chips, intensifying AI hardware competition against Google TPU and Nvidia GPU.
Qualcomm Dragonfly: 250-core CPU, HBC memory, UALink interconnects target AI inference TCO
Qualcomm unveils full data center portfolio: Dragonfly C1000 250-core Oryon CPU (>5GHz, PCIe Gen7, CXL), HBC near-memory compute (133TB/s Gen1, 18x-54x effective BW), AI300 inference accelerator (UALink/ESUN scale-up), and 800G/1.6T connectivity. Multi-year Meta CPU deal. Commercial sampling 2027-2028. Targets inference TCO with tokens-per-watt leadership.
OpenAI and Broadcom Unveil Jalapeno Inference ASIC, Reshaping AI Hardware Landscape
OpenAI, in collaboration with Broadcom, has developed Jalapeno, a custom LLM inference accelerator. The chip uses a multi-chip module with HBM3E memory and achieved tape-out in just nine months. Designed for OpenAI's model stack, it aims to reduce inference costs and dependency on NVIDIA GPUs, with initial deployment planned for late 2026.
Cisco Live US & InfoComm 2026 : la collaboration entre dans l’ère agentique
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Mandiant Reveals Cisco SD-WAN Manager Zero-Day: Control Plane Becomes Prime Target
Mandiant identified a zero-day (CVE-2026-20245) in Cisco Catalyst SD-WAN Manager exploited via malicious CSV upload to escalate to root. The intrusion involved rogue peering, credential manipulation, and anti-forensic cleanup. This highlights SD-WAN centralized control planes as a new attack surface for advanced threats.
NVIDIA and AWS Default GPU Vector Search with cuVS, G7 Instances Deliver 4.6x Inference
NVIDIA and AWS collaborate to embed cuVS as default GPU-accelerated vector search in OpenSearch Serverless, delivering 10x faster indexing at 1/4 cost. New EC2 G7 instances with RTX PRO 4500 Blackwell GPUs achieve up to 4.6x inference performance. AWS achieves GB300 Exemplar Cloud status for training.
China's LineShine Tops TOP500: CPU-Only 2.2 ExaFLOPS with ARMv9 and HBM Memory
LineShine supercomputer achieves 2.198 ExaFLOPS FP64 sustained using 13.79 million ARMv9 cores across 20,480 nodes, making it the first system to exceed 2 ExaFLOPS without GPUs. Each node has dual LX2 CPUs (304 cores) with 32GB HBM, demonstrating a CPU+HBM architecture breakthrough for HPC.
Nokia, Amazon Web Services expand collaboration to deliver autonomous networks built for the AI era
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Microsoft Launches Azure Copilot Observability Agent to Lock Ops Control Plane
Microsoft announces GA of Azure Copilot Observability Agent, built on Azure Monitor. It correlates signals across agents, apps, infrastructure, and services to provide unified operational context. This move aims to lock AI-driven incident diagnosis and remediation workflows deeply within the Azure ecosystem.
Micron-Anthropic Deal Locks AI Memory Demand, But Stock Price Already Priced In
Micron signed a long-term supply contract with Anthropic covering HBM, DRAM, and SSDs, with joint analysis of memory subsystems for AI workloads. Micron also participated in Anthropic's Series H. This aims to transform memory from a commodity to an AI infrastructure asset, but the stock has already run up, requiring proof of sustained scarcity premium.
AWS Lambda MicroVMs: Stateful Isolated Sandboxes via Firecracker Snapshots
AWS launches Lambda MicroVMs, leveraging Firecracker for VM-level isolation, near-instant launch/resume, and stateful execution. Users build images from Dockerfiles in S3, launch from pre-initialized snapshots, and suspend/resume automatically, enabling multi-tenant AI code sandboxes and interactive analytics.
Arm servers capture >45% data center revenue, x86 ecosystem under AI-driven assault
IDC reports Q1 2026 global server revenue hit a record $122.6B, with Arm-based servers capturing >45% share (x86 at 52%). Accelerated servers (GPU/ASIC/FPGA) generated >70% revenue. Nvidia's Grace CPU (NVL72) and hyperscaler custom Arm chips drive the shift; x86 still leads in unit volume but faces supply constraints.
ASML CEO Validates Musk's Terafab, Reshaping AI Chip Supply Chain
ASML's CEO publicly acknowledges tracking Elon Musk's planned terawatt-scale AI supercomputer Terafab, comparing it to Korean DRAM megaprojects. This signals that the sole EUV lithography supplier is allocating capacity, potentially transforming AI chip supply chain and vertical integration.
Nvidia Vera Rubin CPU: 10-Wide Core Redefines CPU for Agentic Computing
At GTC Taipei 2026, Nvidia unveiled the Vera Rubin CPU with a custom 10-wide fetch/decode/execute pipeline, claiming world-leading IPC and bandwidth. Designed for agentic computing, it complements Nvidia GPUs. Nvidia also announced a partnership with Microsoft to reinvent the PC as a Personal AI and committed to returning 50% of free cash flow to shareholders.
Micron-Anthropic Deal: Memory Co-Architecture Locks in AI Supply Chain
Micron and Anthropic sign a strategic agreement covering joint memory/storage architecture design, multi-year supply, Claude adoption, and investment. This ties frontier AI model demands directly to infrastructure design, aiming to optimize token economics and power efficiency, but essentially locks in supply and restructures the ecosystem.
Dell PowerEdge XE8812: Liquid-Cooled Density Trap with NVIDIA Vera Rubin NVL4
Dell launches PowerEdge XE8812 with NVIDIA Vera Rubin NVL4, delivering 144 GPUs per rack, 300kW+ power, and 100% direct liquid cooling. It offers a generational leap in memory and compute density for HPC and AI, but deeply locks users into Dell's PowerRack, iDRAC, and ORv3 ecosystem from chip to rack.
Qualcomm Launches Dragonfly Datacenter Brand, ARM AI Chips Target Intel, AMD, NVIDIA
Qualcomm announced Dragonfly datacenter brand at Computex 2026, including custom ASICs, standard CPUs, and dedicated AI accelerators, extending computing from edge to cloud. First ASIC shipments moved up to 2026. Analysts project $3B revenue in FY2027. This marks Qualcomm's formal entry into the datacenter, challenging X86 and GPU ecosystems.