Reports
AI-generated structured vendor updates
Micron Partners TSMC for Custom HBM4E Logic Dies, Targets 2027 Ramp with 1-gamma DRAM
Micron plans to ramp HBM4E in 2027, transitioning to 1-gamma DRAM and using TSMC for both standard and custom logic dies. This marks a shift from standardized HBM to customized solutions, positioning memory as a strategic asset for AI inference workloads.
SK Hynix Jumps to TSMC 3nm for HBM4E Logic Die to Counter Samsung's 4nm Lead
SK Hynix plans to use TSMC's 3nm process for the logic die in its 7th-gen HBM4E, a leap from the 12nm used in HBM4. This aims to reverse the performance gap with Samsung (which used 4nm logic in HBM4) and deliver higher bandwidth and power efficiency for next-gen AI chips like NVIDIA's Vera Rubin Ultra.
Samsung Unveils HBM4E and Hybrid Copper Bonding for AI Infrastructure
Samsung announced HBM4 mass production and showcased next-gen HBM4E with 4TB/s bandwidth at GTC 2026. Hybrid copper bonding enables 16+ layers with 20% lower thermal resistance. Also launched SOCAMM2 memory and PCIe 6.0 SSD for NVIDIA AI infrastructure.
SK Hynix HBM4E Samples: 3nm Logic, 384GB/GPU, Igniting AI Memory Bandwidth Arms Race
SK Hynix has sampled its 12-layer HBM4E, featuring TSMC 3nm logic die and enhanced per-pin bandwidth, targeting Nvidia Rubin Ultra with 384GB per GPU. This marks the start of a sprint with Samsung in next-gen AI memory, where HBM BOM share has surged to 65-70%.