Reports
AI-generated structured vendor updates
Intel 18A Yield Hits 85%, Secures Orders from NVIDIA, OpenAI, Reshaping Foundry Landscape
Intel reports 18A process yield improvement to 85%, from 65% last quarter, nearing TSMC N2's 90%. Secured foundry deals with NVIDIA, AMD, OpenAI, etc. EMIB advanced packaging yield reaches 98%, used in NVIDIA Feynman, Google TPU. This marks a strategic inflection in AI chip manufacturing.
Etched Unveils Sohu Transformer ASIC: Claims 20x H100 Inference Throughput, Challenging NVIDIA's Grip
AI chip startup Etched emerges from stealth with Sohu, a Transformer-specific ASIC on TSMC N4P with 144GB HBM3E. By hardwiring attention mechanisms, it claims 20x throughput and 140x price-performance vs. H100 on Llama 70B. With $800M total funding and first racks shipping this summer, it directly challenges NVIDIA's inference dominance.
AWS and Google Open Custom AI Chips for External Sales, ASIC Shipment Growth Surpasses GPU, TCO Inflection Point Reached
In Q2 2026, AWS Trainium and Google TPU are commercialized externally for the first time. Custom ASIC shipment growth of 44.6% surpasses GPU's 16.1%. ASIC TCO advantage reaches 40-65% for large-scale inference; Midjourney cut monthly compute cost from $2.1M to $0.7M after migrating to TPU. This marks a structural inflection point in AI compute.
Google TPU v9 Switches to MediaTek, Breaking Broadcom's AI ASIC Monopoly
Google moves its TPU v9 Humufish design and integration contract from Broadcom to MediaTek, which handles I/O chip design and packaging. Combined with a split-foundry strategy (TSMC N2 compute, Samsung 2nm I/O), this marks a systematic effort to build a multi-vendor, multi-node supply chain, directly dismantling Broadcom's dominance in custom AI ASICs.
MediaTek Pivots to System-Level Integration: Targeting Google TPU and Musk AI Rack Deals
MediaTek elevates its AI strategy from chip design to system-level integration, targeting Google TPU PCBA L6 and Musk AI chip L10 rack assembly. Adopting a light-asset model via Taiwan's supply chain, targeting >40% gross margin, driven by rising complexity from CPO and 800V high-voltage DC power.
MediaTek Shifts from Chip Design to System Integration for Google TPU and Musk's AI Racks
MediaTek upgrades its AI strategy from chip/ASIC design to system-level integration, targeting Google TPU PCBA and Musk's AI chip rack-level (L10) work. Using an asset-light model, it leads design and validation while outsourcing manufacturing, aiming for 40-50% gross margin.