Reports
AI-generated structured vendor updates
AMD Unveils Zen 6 Venice, MI455X, and Helios Rack-Level Design to Challenge NVIDIA
At Advancing AI 2026, AMD launched Zen 6 EPYC Venice (2nm, up to 256 cores) and MI455X (CDNA5, 432GB HBM4, 40 PFLOPS FP4), along with Helios rack reference design (2.9 exaFLOPS FP4 per rack), claiming a 1000x AI performance roadmap, with major commitments from Meta, OpenAI, and others.
ASML Q2营收93.3亿欧元超预期，上调全年指引
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NVIDIA Reveals Vera Rubin GPU and Vera CPU: 3360B Transistors, 88-Core Olympus, 10x Agentic AI Efficiency
NVIDIA fully discloses Vera Rubin GPU and Vera CPU specifications. The GPU features 3360B transistors, HBM4 288GB, and 10x agentic AI efficiency over Blackwell. The CPU has 88 custom Olympus cores, delivering 2.2x faster agentic AI performance than Intel Sapphire Rapids. This solidifies NVIDIA's full-stack strategy against x86 incumbents.
Microsoft Azure Deploys AMD Helios Rack with MI455X GPUs, Breaking NVIDIA's Cloud AI Monopoly
Microsoft Azure officially adopts AMD Helios rack-scale AI infrastructure, featuring 72 MI455X GPUs (432GB HBM4, 19.6TB/s), Venice EPYC CPUs, and Pensando DPUs. Three new instances (ND MI455X v7, HDv2, HXv2) are launched, marking Azure's shift from exclusive NVIDIA dependency to a multi-vendor AI strategy.
Intel Foundry 18A Yields Jump to 85%+; EMIB Packaging Hits 98%, Challenging TSMC N2
Intel Foundry 18A yields surged from 65% to 85%+ in a single quarter, approaching TSMC N2's 90%. EMIB advanced packaging yields reached 90-98%, turning a former bottleneck into a selling point. NVIDIA, AMD, Apple signed on but mostly as secondary suppliers.
TSMC Pledges $100B More for 6 US Fabs, Localizing 3nm for AI Chip Supply Chain
TSMC announces an additional $100B investment in Arizona, bringing total US commitment to $265B, with plans for 6 fabs focused on 3nm and beyond. This move localizes advanced process for AI chip demand from NVIDIA, Apple, AMD, reshaping global semiconductor supply chain. Q2 net profit surged 77% YoY, FY capex raised to $60-64B.
AMD与OpenAI达成6GW算力供应历史性协议 1.6亿认股权证可获10%股权 股价盘前涨35%
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Intel 18A Yield Hits 85%, Secures Orders from NVIDIA, OpenAI, Reshaping Foundry Landscape
Intel reports 18A process yield improvement to 85%, from 65% last quarter, nearing TSMC N2's 90%. Secured foundry deals with NVIDIA, AMD, OpenAI, etc. EMIB advanced packaging yield reaches 98%, used in NVIDIA Feynman, Google TPU. This marks a strategic inflection in AI chip manufacturing.
AMD Confirms Zen 6 EPYC Venice: First 2nm Server CPU Launching July 2026
AMD confirms Zen 6 EPYC Venice launch at Advancing AI 2026 (July 22-23). As the first 2nm server CPU, it features triple-core hybrid architecture, up to 192 cores, ~29% single-thread and ~22% multi-thread gains, targeting AI inference and tight CPU-GPU synergy via Infinity Fabric.
JCET's $1.4B AI Packaging Capex Reshapes Advanced Packaging Supply Chain
JCET announces $1.4B capex for AI advanced packaging in 2026, targeting Chiplet, HBM, 2.5D/3D. This marks Chinese OSAT's major entry into high-end packaging, complementing TSMC's CoWoS expansion and shifting AI packaging from Taiwan-centric to cross-strait division, supporting local hyperscalers' computing needs.
TSMC CoWoS Capacity to Reach 200k Wafers by 2027, Diversifying from GPU to CPU and ASIC
TSMC targets 200k wpm CoWoS capacity by 2027, narrowing supply-demand gap from 20% to 10%. Customer base diversifies from NVIDIA GPU to include AI server CPUs (MediaTek, AMD) and ASICs (Broadcom). CoPoS panel-level packaging enters pilot production in 2027.
TSMC Hikes Sub-7nm Prices 8-12%, Extends Lead Times to 26 Weeks, Triggering AI Chip Cost Inflation
TSMC raises sub-7nm wafer prices by 8-12% and extends lead times to 26 weeks, effective July 2026. New v2.1 directive mandates EDA tool validation for PDK access. This directly inflates AI chip TCO, delays new product launches, and solidifies TSMC's control over the AI supply chain.
AWS Sells Trainium 3 Externally, Challenging NVIDIA's AI Training Chip Dominance
AWS begins external sales of its Trainium 3 AI training chip, fabricated on TSMC 3nm process, delivering 2.52 PFLOPS per chip. Early customers include Anthropic and Uber. This move directly challenges NVIDIA's dominance and marks AWS's strategic shift from cloud provider to chip vendor.
TSMC Ramps PIC Capacity to 25K Wafers, CPO Silicon Photonics Poised to Disrupt AI Interconnects
TSMC plans to expand its PIC capacity to 25,000 wafers per month by 2028, with its COUPE platform becoming critical for reducing latency and power in AI systems. Initial capacity is allocated to NVIDIA, Broadcom, and AMD, marking CPO's transition from lab to mass production and accelerating the shift from electrical to optical AI interconnects.
NVIDIA Denies Kyber NVL144 Delay, But 78-Layer PCB Bottleneck Exposes AI Hardware Physics Limit
NVIDIA officially denies reports of Kyber NVL144 rack delay to 2028, but SemiAnalysis revelations about a 78-layer ultra-high-density PCB midplane bottleneck and Rubin Ultra cancellation expose hard physical limits in signal integrity and manufacturing, opening a strategic window for AMD and Google.
Anthropic Starts Custom AI Chip Development, Talks Samsung 2nm, Aims for Compute Independence
Anthropic has initiated its own AI chip development and is in talks with Samsung for 2nm foundry services. The move aims to reduce reliance on NVIDIA GPUs, optimize inference costs, and strengthen its technology moat ahead of a potential IPO. It joins OpenAI, Google, and others in the custom ASIC race, signaling a shift from software to hardware competition.
NVIDIA AI Compute Partnership: Revenue Share and Credit Backstop to Lock Cloud Providers into DSX AI Factories
NVIDIA launches AI Compute Partnership with revenue sharing and credit backstop, shifting from hardware sales to recurring service revenue. Initial projects include 40K GB300 chips for Sharon AI and 170K GPUs for Firmus, totaling 200K+ high-end chips. NVIDIA is becoming the 'central bank' of AI compute, squeezing cloud brokers.
AMD and NVIDIA Raise GPU Kit Prices by 10%: GDDR Shortage Exposes AI Supply Squeeze
AMD has notified AIB partners of a ~10% price hike on GPU+GDDR bundled kits effective July 2026, following NVIDIA's similar move on RTX 5090 series. The dual price increases stem from severe GDDR supply shortages driven by the AI boom and memory super-cycle, foreshadowing broad retail GPU price increases in H2.
TSMC under triple pressure: customer diversification, patent challenges, and EUV strategy shift
TSMC faces operational, legal, and commercial pressures: Google splits Icefish AI chip production with Samsung, US ITC patent probe risks import bans, and resource bottlenecks (labor, water, power) limit expansion. TSMC confirms it will skip high-NA EUV until 2029, using multi-patterning on low-NA EUV for 2nm, saving $5-10B.
TSMC Capacity Crunch Reshapes Foundry Landscape: Google, AMD, Tesla Move to Samsung for Advanced Nodes
TSMC's advanced capacity shortage through 2027 pushes Google, AMD, and Tesla to Samsung for 3nm/2nm foundry services. Samsung's 6.5% market share may see structural growth, shifting global chip supply from single-source to multi-source, though yield and trust issues persist.