Reports
AI-generated structured vendor updates
AMD and Rackspace Deploy 30MW Governed AI Stack: Ecosystem Restructuring from Silicon to Outcomes
AMD and Rackspace sign a definitive agreement to deploy 30MW of AMD AI compute (Instinct GPUs including MI355X, EPYC CPUs) across Rackspace's data centers, creating a governed enterprise AI stack with single accountability from silicon to outcomes, targeting regulated industries.
D-Wave's Dual-Platform Quantum Push: Annealing and Gate-Model Convergence Challenges IBM
D-Wave reported $33.4M Q1 bookings (up 2000% YoY), with 73% commercial revenue. Its dual-platform strategy (annealing + gate-model) targets 100 logical qubits by 2032. CEO challenges industry hype, urging focus on real customers and published results.
AMD Acquires MEXT: AI-Predicted Flash Nears DRAM Performance to Cut AI Memory TCO
AMD acquires MEXT, an AI-driven memory optimization startup. MEXT's predictive technology makes NAND Flash behave like DRAM, expanding effective memory capacity for AI workloads and lowering TCO. The tech will be integrated across AMD's data center portfolio (EPYC, Instinct) to address memory bottlenecks in large models.
AMD Open-Sources AI Software Stack on Vultr, Taking on NVIDIA CUDA Ecosystem
AMD launches a suite of open-source, modular enterprise AI software components on Vultr Marketplace, including AMD Inference Microservices (AIMs), AI Workbench, Resource Manager, and Solution Blueprints. This aims to provide production-grade AI infrastructure without vendor lock-in, directly challenging NVIDIA's CUDA ecosystem.
AMD, Dell, Cambridge Launch UK Sovereign AI Lab to Challenge NVIDIA's CUDA Dominance with Open ROCm
AMD, Dell, and the University of Cambridge launch the Sovereign AI Innovation Lab (SAIL) in the UK, deploying Zenith supercomputer with 5th Gen EPYC and Instinct MI355X GPUs, plus the Sunrise fusion AI system. The lab promotes open, interoperable AI infrastructure based on AMD ROCm, challenging NVIDIA's CUDA lock-in and offering long-term technology choice for national AI initiatives.
AMD EPYC Challenges Rack-Scale Density for Agentic AI Control
AMD claims its EPYC processors lead in rack-scale performance for agentic AI's CPU-intensive services (orchestration, caching, databases). Under a 100kW rack model, EPYC 9965 'Turin' delivers 2.37x throughput over NVIDIA Vera, with next-gen 'Venice' projected at 3.30x. Emphasizes deployability on current x86 platforms, avoiding future architecture dependency.
Cisco Unveils AI-Native Branch Architecture with AgenticOps and PQC
At Cisco Live 2026, Cisco refreshes the Secure Router 8000 series and introduces a Unified Branch architecture with AgenticOps, post-quantum cryptography (PQC), and hybrid mesh firewalling. The control plane moves to Cisco Cloud Control, aiming for an AI-native, cloud-managed WAN platform.
Cisco Shifts AI Network Control from K8s Black Box to Unified Fabric via Isovalent and VXLAN ESG
Cisco integrates Isovalent's eBPF into Nexus One for pod-to-fabric visibility and introduces VXLAN ESG-based AI job segmentation, embedding security and multi-tenancy into the network fabric. This targets the Kubernetes 'black box' bottleneck in AI inference, unifying control and troubleshooting.
Intel and SambaNova Rackscale AI: CPU Regains Inference Control Plane
At Computex 2026, Intel unveiled rack-scale AI infrastructure combining Xeon 6+ with SambaNova SN-50 RDUs, plus a fully disaggregated inference cloud (prefill on NVIDIA Blackwell, decode on RDUs) by Vector Core Compute. This aims to reposition the CPU as the central orchestrator for inference, challenging GPU dominance.
HPE Launches Vera CPU Server for Agentic AI, Reshaping Server Ecosystem
HPE unveils ProLiant DL394 Gen12 with NVIDIA Vera CPU, purpose-built for agentic AI and reinforcement learning. It offers extreme single-core performance and high memory bandwidth, with HPE iLO security and Compute Ops Management. The platform is validated with Redpanda and NYSE for financial workloads.
Cisco Full-Stack PQC Switches Lock Down Quantum Security with Hardware Trust Anchor
Cisco unveils C9000 Smart Switches, the first enterprise switches with full-stack post-quantum cryptography (PQC). A **Trust Anchor module (TAm)** embedded in FPGA enables quantum-resistant secure boot, while **IOS XE** integrates **ML-KEM** for key exchange in **SSH, MACsec, IPsec, TLS**. Aimed at harvest-now-decrypt-later threats, but no performance data disclosed.
AMD Ryzen AI Halo & Max PRO 400: Local 300B Parameter Inference, but Hidden Lock-in and Thermal Limits
AMD launches Ryzen AI Halo developer platform (128GB unified memory, 200B parameter models) and Ryzen AI Max PRO 400 series (first x86 client to run 300B parameter models locally). Unified memory, ROCm optimization, and OEM partnerships aim to shift agentic AI from cloud to local, but shared memory bandwidth and thermal constraints limit real-world throughput.
AMD Backs SPEC CPU 2026 Benchmark, Emphasizing Open, Trusted Performance Measurement
AMD published a blog endorsing the upcoming SPEC CPU 2026 industry benchmark, emphasizing the critical role of open, reproducible CPU performance standards for customer infrastructure decisions in the AI era. The new benchmark updates its application suite and strengthens support for bare-metal cloud environments and parallel computing.
AMD and OpenAI Contribute MRC Protocol to OCP for Scalable AI Networking
AMD, in collaboration with OpenAI, Microsoft, and others, contributed the MRC (Multipath Reliable Connection) protocol, designed for large-scale AI training, to the Open Compute Project (OCP). AMD co-authored the specification and has already deployed MRC on its programmable Pensando DPU/NIC products, positioning its networking technology as a key enabler for resilient and adaptive AI infrastructure.
AMD and OpenAI Introduce MRC, a Next-Gen Transport Protocol for AI Training
AMD, in collaboration with OpenAI, Microsoft, and other industry leaders, has released the specification for the Multipath Reliable Connection (MRC) protocol. MRC addresses performance bottlenecks of RoCEv2 in hyperscale AI training clusters through intelligent packet spraying, selective retransmission, and network-signaled congestion control, aiming to improve bandwidth utilization and job resilience.
Intel Appoints Leadership to Integrate Client Computing and Physical AI
Intel appointed Alex Katouzian as EVP/GM of Client Computing and Physical AI Group, and named Pushkar Ranade as CTO. This move aims to align traditional PC business with physical AI systems (robotics, autonomous machines) and advance frontier technologies like quantum computing.
AMD Showcases Heterogeneous Computing Strategy for Enterprise AI with Dell
At Dell Technologies World, AMD highlighted its heterogeneous computing portfolio, aiming to match the right compute engine to specific enterprise AI workloads, while emphasizing hardware-based security and manageability. This signals a shift in AI infrastructure from generic solutions to fine-tuned, scenario-specific deployments.
AMD Proposes New AI Infrastructure Networking Paradigm: From Lossless Fabrics to Intelligent Endpoints
AMD published a blog outlining seven key questions for building large-scale AI infrastructure, arguing that traditional lossless Ethernet or InfiniBand architectures face cost and complexity bottlenecks. It advocates shifting network intelligence and reliability functions from expensive, specialized switches to intelligent NICs, enabling reliable transport over standard (potentially lossy) Ethernet to reduce TCO and simplify operations.
Cloudflare GA Post-Quantum IPsec: Hybrid ML-KEM Standard Defeats QKD, Proprietary Suites
Cloudflare announces GA of post-quantum encryption for its IPsec product, implementing hybrid **ML-KEM (FIPS 203)** per **draft-ietf-ipsecme-ikev2-mlkem**. It achieves interoperability with **Cisco IOS XE** and **Fortinet FortiOS 7.6.6+** without special hardware. This extends post-quantum security to site-to-site WAN and explicitly rejects the **QKD** approach.
AMD and Liquid AI Discuss Efficient AI Architecture from Silicon to Systems
AMD's CTO and Liquid AI's CEO discuss the evolution of AI architecture, emphasizing efficiency as key to extending AI from the cloud to edge and endpoint devices. They argue that co-design from silicon to systems enables low-power, responsive AI inference, supporting always-on agents and multi-model orchestration.