Reports
AI-generated structured vendor updates
AMD Zen 6 Venice 256-Core EPYC Claims 3.3x Rack Performance Over NVIDIA Vera, But Estimates Raise Questions
AMD unveils first estimated performance of Zen 6 Venice EPYC (2nm, 256 cores), claiming 3.3x rack-level integer throughput over NVIDIA Vera at 100kW total power. A direct counter to NVIDIA's Arm push, but based on projected estimates, not silicon.
AMD, Dell, Cambridge Launch UK Sovereign AI Lab to Challenge NVIDIA's CUDA Dominance with Open ROCm
AMD, Dell, and the University of Cambridge launch the Sovereign AI Innovation Lab (SAIL) in the UK, deploying Zenith supercomputer with 5th Gen EPYC and Instinct MI355X GPUs, plus the Sunrise fusion AI system. The lab promotes open, interoperable AI infrastructure based on AMD ROCm, challenging NVIDIA's CUDA lock-in and offering long-term technology choice for national AI initiatives.
AMD EPYC Challenges Rack-Scale Density for Agentic AI Control
AMD claims its EPYC processors lead in rack-scale performance for agentic AI's CPU-intensive services (orchestration, caching, databases). Under a 100kW rack model, EPYC 9965 'Turin' delivers 2.37x throughput over NVIDIA Vera, with next-gen 'Venice' projected at 3.30x. Emphasizes deployability on current x86 platforms, avoiding future architecture dependency.
NVIDIA Vera 88-Core Arm CPU: Control Plane Shifts from x86 to NVIDIA for AI Agent Workloads
NVIDIA unveils Vera, its first standalone datacenter CPU with 88 custom Arm Olympus cores, monolithic mesh, 1.2TB/s LPDDR5X bandwidth, achieving 1.8x x86 performance in agent workloads. Tightly coupled with GPUs via NVLink-C2C, Vera shifts the control plane from Intel/AMD to NVIDIA. First customers: OpenAI, Anthropic. Production Q3 2026.
NVIDIA's Triple Play: Vera CPU, N1X Laptop Chip, and $6.5B Silicon Photonics Reshape AI Infra Control
NVIDIA delivers first agent-specific Vera CPU (88 Arm v9.2 cores, 1.2TB/s memory bandwidth), teases consumer N1X laptop chip, and invests $6.5B in silicon photonics. This shifts AI orchestration control from x86 to NVIDIA's Arm ecosystem, while CPO addresses memory wall, but volume production remains challenging until post-2028.
NVIDIA Vera CPU Benchmark Crushes x86: Memory Bandwidth Hegemony for Agentic AI
Phoronix benchmarks show NVIDIA Vera CPU with 88 custom Olympus cores (Armv9.2), 1.2TB/s LPDDR5X bandwidth, and 450W TDP outperforming Intel/AMD x86 across agentic AI workloads. It achieves 1.5x overall performance vs 128-core x86, 90% STREAM TRIAD efficiency, and 20-second Linux kernel compilation.
AMD Ryzen AI Halo & Max PRO 400: Local 300B Parameter Inference, but Hidden Lock-in and Thermal Limits
AMD launches Ryzen AI Halo developer platform (128GB unified memory, 200B parameter models) and Ryzen AI Max PRO 400 series (first x86 client to run 300B parameter models locally). Unified memory, ROCm optimization, and OEM partnerships aim to shift agentic AI from cloud to local, but shared memory bandwidth and thermal constraints limit real-world throughput.
AI Agent Workloads Trigger Structural CPU Shortage, Arm and AMD Reshape Server Value Chain
AI inference and agent orchestration surge CPU demand, shifting CPU-GPU ratio from 1:8 to 1:1. AMD EPYC lead time 8-12 weeks, Intel Xeon up to 6 months; Arm's 3nm 136-core AGI processor co-developed with Meta/Cerebras/Cloudflare/OpenAI sees demand exceeding 200 billion USD. CPU replaces GPU as the new AI infrastructure bottleneck, with Arm and AMD reshaping the value chain.
AMD Backs SPEC CPU 2026 Benchmark, Emphasizing Open, Trusted Performance Measurement
AMD published a blog endorsing the upcoming SPEC CPU 2026 industry benchmark, emphasizing the critical role of open, reproducible CPU performance standards for customer infrastructure decisions in the AI era. The new benchmark updates its application suite and strengthens support for bare-metal cloud environments and parallel computing.
AMD and OpenAI Contribute MRC Protocol to OCP for Scalable AI Networking
AMD, in collaboration with OpenAI, Microsoft, and others, contributed the MRC (Multipath Reliable Connection) protocol, designed for large-scale AI training, to the Open Compute Project (OCP). AMD co-authored the specification and has already deployed MRC on its programmable Pensando DPU/NIC products, positioning its networking technology as a key enabler for resilient and adaptive AI infrastructure.
AMD and OpenAI Introduce MRC, a Next-Gen Transport Protocol for AI Training
AMD, in collaboration with OpenAI, Microsoft, and other industry leaders, has released the specification for the Multipath Reliable Connection (MRC) protocol. MRC addresses performance bottlenecks of RoCEv2 in hyperscale AI training clusters through intelligent packet spraying, selective retransmission, and network-signaled congestion control, aiming to improve bandwidth utilization and job resilience.
AMD Showcases Heterogeneous Computing Strategy for Enterprise AI with Dell
At Dell Technologies World, AMD highlighted its heterogeneous computing portfolio, aiming to match the right compute engine to specific enterprise AI workloads, while emphasizing hardware-based security and manageability. This signals a shift in AI infrastructure from generic solutions to fine-tuned, scenario-specific deployments.
AMD Proposes New AI Infrastructure Networking Paradigm: From Lossless Fabrics to Intelligent Endpoints
AMD published a blog outlining seven key questions for building large-scale AI infrastructure, arguing that traditional lossless Ethernet or InfiniBand architectures face cost and complexity bottlenecks. It advocates shifting network intelligence and reliability functions from expensive, specialized switches to intelligent NICs, enabling reliable transport over standard (potentially lossy) Ethernet to reduce TCO and simplify operations.
AMD and Liquid AI Discuss Efficient AI Architecture from Silicon to Systems
AMD's CTO and Liquid AI's CEO discuss the evolution of AI architecture, emphasizing efficiency as key to extending AI from the cloud to edge and endpoint devices. They argue that co-design from silicon to systems enables low-power, responsive AI inference, supporting always-on agents and multi-model orchestration.
AMD Extends Edge AI Architecture to Space, Defining Orbital Computing Paradigm
AMD's CTO proposes applying the core principles of 'performance-per-watt' and 'mission-critical reliability' from terrestrial edge AI to space computing. The company is providing a repeatable platform foundation for in-orbit satellite intelligence and future orbital data centers through heterogeneous computing, open software stacks, and modular system design.
AMD Highlights AI PC as Critical Infrastructure for Enterprise Agentic AI in IDC White Paper
AMD released an IDC white paper indicating that over 80% of enterprises are planning, piloting, or deploying AI PCs to support scaled Agentic AI. The report highlights high-performance NPUs and on-device AI processing as critical for enabling real-time, secure workflows, signaling a shift in enterprise AI infrastructure from cloud to endpoint.
AMD Announces Breakthrough MLPerf Inference 6.0 Results, Showcasing Multinode Scaling and Multimodal Capabilities
AMD's MLPerf Inference 6.0 submission, powered by Instinct MI355X GPUs, surpassed 1 million tokens per second for the first time on models like Llama 2 70B and GPT-OSS-120B. The results highlight efficient multinode scaling, rapid enablement of new workloads (e.g., text-to-video model Wan-2.2-t2v), and reproducible performance across a broad partner ecosystem.
AMD and Celestica Launch Rack-Scale AI Platform Helios
AMD partners with Celestica to launch Helios rack-scale AI platform, integrating Instinct accelerators and EPYC processors for chip-to-rack optimization. The platform targets AI training and inference workloads with performance and efficiency enhancements for data center and cloud providers.
AMD Highlights CPU's Critical Role in Agentic AI Orchestration and Inference
AMD states Agentic AI workloads require serial decision-making and context management, better suited for CPUs. The company emphasizes high-core-count, high-memory-bandwidth server CPUs will lead in agent orchestration and lightweight inference, complementing GPUs in training. This signals a strategic repositioning of CPUs in AI data center architecture.
AMD and NAVER Cloud Collaborate on Sovereign AI Infrastructure in Korea
AMD and NAVER Cloud announced a strategic collaboration to accelerate sovereign AI infrastructure in Korea. NAVER Cloud will expand deployment of AMD EPYC "Venice" CPUs and gain early access to next-gen Instinct MI455X GPUs, with joint optimization of AI services and software stacks on AMD platforms.