Reports
AI-generated structured vendor updates
TSMC Ramps PIC Capacity to 25K Wafers, CPO Silicon Photonics Poised to Disrupt AI Interconnects
TSMC plans to expand its PIC capacity to 25,000 wafers per month by 2028, with its COUPE platform becoming critical for reducing latency and power in AI systems. Initial capacity is allocated to NVIDIA, Broadcom, and AMD, marking CPO's transition from lab to mass production and accelerating the shift from electrical to optical AI interconnects.
NVIDIA Denies Kyber NVL144 Delay, But 78-Layer PCB Bottleneck Exposes AI Hardware Physics Limit
NVIDIA officially denies reports of Kyber NVL144 rack delay to 2028, but SemiAnalysis revelations about a 78-layer ultra-high-density PCB midplane bottleneck and Rubin Ultra cancellation expose hard physical limits in signal integrity and manufacturing, opening a strategic window for AMD and Google.
NVIDIA Kyber NVL144 Delayed to 2028: Midplane PCB Manufacturing Becomes AI Scaling Bottleneck
SemiAnalysis reveals NVIDIA's Kyber NVL144 delayed beyond 12 months to 2028 due to 78-layer Orthogonal Backplane manufacturing challenges. The interim NVL72x2 solution is cancelled due to operational burdens, and the 4-die Rubin Ultra is also scrapped, leaving a product gap in NVIDIA's scaling roadmap.
Nvidia Vera Rubin CPU: 10-Wide Core Redefines CPU for Agentic Computing
At GTC Taipei 2026, Nvidia unveiled the Vera Rubin CPU with a custom 10-wide fetch/decode/execute pipeline, claiming world-leading IPC and bandwidth. Designed for agentic computing, it complements Nvidia GPUs. Nvidia also announced a partnership with Microsoft to reinvent the PC as a Personal AI and committed to returning 50% of free cash flow to shareholders.
MediaTek Pivots to System-Level Integration: Targeting Google TPU and Musk AI Rack Deals
MediaTek elevates its AI strategy from chip design to system-level integration, targeting Google TPU PCBA L6 and Musk AI chip L10 rack assembly. Adopting a light-asset model via Taiwan's supply chain, targeting >40% gross margin, driven by rising complexity from CPO and 800V high-voltage DC power.
MediaTek Shifts from Chip Design to System Integration for Google TPU and Musk's AI Racks
MediaTek upgrades its AI strategy from chip/ASIC design to system-level integration, targeting Google TPU PCBA and Musk's AI chip rack-level (L10) work. Using an asset-light model, it leads design and validation while outsourcing manufacturing, aiming for 40-50% gross margin.
Cisco Live 2026: AI Defense Upgrades with Policy Studio, Adaptive Red Teaming, Agent Supply Chain Security
At Cisco Live 2026, Cisco unveiled AI Defense upgrades: adaptive red teaming, Policy Studio for natural language policy, and agent supply chain security with CI/CD integration. It also launched AgenticOps autonomous network operations and native integrations with Amazon Bedrock, Google ADK, LangChain, aiming to secure multi-framework agent environments.
NVIDIA's Triple Play: Vera CPU, N1X Laptop Chip, and $6.5B Silicon Photonics Reshape AI Infra Control
NVIDIA delivers first agent-specific Vera CPU (88 Arm v9.2 cores, 1.2TB/s memory bandwidth), teases consumer N1X laptop chip, and invests $6.5B in silicon photonics. This shifts AI orchestration control from x86 to NVIDIA's Arm ecosystem, while CPO addresses memory wall, but volume production remains challenging until post-2028.
Nokia Launches Application-Optimized Optical Solution Suite for AI-Era Networks
Nokia announced a suite of new coherent optical transport solutions and a compact multi-fiber amplifier, employing a building-block design methodology to optimize performance, power, and cost for diverse AI application scenarios like DCI and campus networks.
Google Advocates for Privacy by Innovation, Shaping Data Protection for the AI Assistant Era
Google's President of Global Affairs outlined a 'privacy by innovation' vision at the IAPP summit, arguing that data protection frameworks must evolve alongside AI assistant technologies. He emphasized moving beyond traditional consent models towards context-aware controls, granular agent access management, and built-in safeguards. This represents a systemic shift in thinking about privacy and security governance in the AI era.
Google Proposes Privacy Innovation Framework for AI Assistants
Google's President of Global Affairs Kent Walker outlined a new privacy framework for the AI era at IAPP Global Summit 2026, emphasizing 'privacy as quality' through technological innovation, while demonstrating how its personalized AI assistant integrates multi-app data for proactive services.
FortiOS 8.0 GenAI Detection: New Paradigm for Enterprise AI Visibility
FortiOS 8.0 introduces AIAP database and GenAI-specific log fields for network-layer detection of ChatGPT, Gemini and other AI services. Six dedicated log fields cover complete information chain.
Cisco Launches G300 Chip and Systems for AI Agent-Era Data Center Networking
Cisco introduces 102.4Tbps Silicon One G300 switching chip with liquid-cooled N9000/8000 systems delivering 70% energy efficiency, 1.6T optics support, and Nexus One unified management plane upgrade.
Cisco's Second AI Summit Focuses on AI Economy Builders, Uniting Infrastructure and Model Layer Leaders from NVIDIA, OpenAI, AWS, Google
Cisco announced its second annual AI Summit on February 3, 2026, hosted by CEO Chuck Robbins and CPO Jeetu Patel. The speaker lineup unites decision-makers across AI infrastructure (NVIDIA, AWS, Google), core models (OpenAI, Anthropic), applications (Figma, Box), and capital (Andreessen Horowitz). The agenda spans the full spectrum of AI's influence, from reshaping compute, venture capital, and infrastructure to redefining design, workforce, and geopolitics.