Reports
AI-generated structured vendor updates
英特尔与Fortinet共同开发SP6安全处理器，强化网络防火墙ASIC能力
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FortiBleed攻击全球暴露约75000台Fortinet防火墙设备
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Google's Frozen v2 Chip Hardwires Gemini Architecture for 6-10x TPU Efficiency, Set for 2028
Google is developing Frozen v2, a dedicated AI chip that hardwires the Gemini model architecture into silicon for 6-10x energy efficiency per token over current TPUs. It is a new product line, planned for 2028, with weight update flexibility but a frozen architecture. This validates the industry shift from general-purpose GPUs to dedicated ASICs for AI inference.
Google DeepMind AlphaEvolve GA: AI Self-Evolution for Data Center and Algorithm Optimization
On July 19, 2026, Google DeepMind announced the GA of AlphaEvolve, a Gemini-based multi-agent evolution system for algorithmic discovery, mathematical discovery, and data center efficiency optimization, already used in Borg and Orca, aiming to reduce Capex in massive AI compute investments.
NVIDIA-Nokia Alliance Redefines RAN Ecosystem with GPU-Based AI Acceleration
NVIDIA and Nokia are jointly developing AI-powered RAN technology, using NVIDIA GPUs to accelerate baseband processing and AI algorithms for beamforming and spectrum optimization. Targeting commercial deployment by 2027 and 2x spectral efficiency by 2028, this partnership marks a fundamental shift from dedicated RAN hardware to GPU-based, software-defined AI networks.
Meta Iris Chip to Mass Produce in September: 6-Month Cadence Threatens NVIDIA GPU Hegemony
Reuters confirms Meta's Iris AI chip mass production in September, targeting 2.5GW by end-2026 and 14GW by 2027. Meta's 6-month MTIA generation cadence directly challenges NVIDIA's annual GPU cycle, signaling a hyperscaler shift from GPU dependency to custom ASIC sovereignty.
JCET's $1.4B AI Packaging Capex Reshapes Advanced Packaging Supply Chain
JCET announces $1.4B capex for AI advanced packaging in 2026, targeting Chiplet, HBM, 2.5D/3D. This marks Chinese OSAT's major entry into high-end packaging, complementing TSMC's CoWoS expansion and shifting AI packaging from Taiwan-centric to cross-strait division, supporting local hyperscalers' computing needs.
TSMC CoWoS Capacity to Reach 200k Wafers by 2027, Diversifying from GPU to CPU and ASIC
TSMC targets 200k wpm CoWoS capacity by 2027, narrowing supply-demand gap from 20% to 10%. Customer base diversifies from NVIDIA GPU to include AI server CPUs (MediaTek, AMD) and ASICs (Broadcom). CoPoS panel-level packaging enters pilot production in 2027.
AWS Boosts Trainium3 ASIC Shipments, Accelerating Custom AI Chip Ecosystem Against NVIDIA
Amazon AWS has notified its supply chain to increase Q3 2026 shipments of Trainium3-based ASIC servers by 20-30%. This reflects growing confidence in its custom AI chips and a strategic push to reduce reliance on NVIDIA GPUs. AWS also partnered with OpenAI to develop a Stateful Runtime Environment on Bedrock.
AWS boosts Trainium 3 shipments, accelerating ASIC substitution for NVIDIA GPUs
Supply chain sources indicate Amazon AWS has instructed vendors to increase Trainium 3 shipments for Q3 2026 by 20-30%. This signals strong confidence in its custom ASIC strategy to reduce dependence on NVIDIA GPUs, leveraging superior cost and power efficiency for cloud AI training.
Anthropic Starts Custom AI Chip Development, Talks Samsung 2nm, Aims for Compute Independence
Anthropic has initiated its own AI chip development and is in talks with Samsung for 2nm foundry services. The move aims to reduce reliance on NVIDIA GPUs, optimize inference costs, and strengthen its technology moat ahead of a potential IPO. It joins OpenAI, Google, and others in the custom ASIC race, signaling a shift from software to hardware competition.
AWS Trainium 3 Shipments Surge 20-30%, Shifting AI Compute Control from NVIDIA to Custom Silicon
Supply chain sources indicate AWS has raised Q3 Trainium 3 server shipments by 20-30%, driven by Anthropic. Trainium 2 is sold out, Trainium 3 nearly fully booked, with customers already queuing for Trainium 4 and development of Trainium 5 underway. This signals AWS's aggressive push to own the AI compute stack via custom silicon.
Meta Shifts MTIA ASIC to Samsung 2nm: Ecosystem Restructuring in AI Chip Fab
Meta partners with Samsung for next-gen MTIA ASIC production, moving from TSMC to Samsung 2nm node. Targeting hundreds of thousands of units to support 5GW data center goal by 2030, with new chip every six months, restructuring the AI chip supply chain ecosystem.
Etched Unveils Sohu Transformer ASIC: Claims 20x H100 Inference Throughput, Challenging NVIDIA's Grip
AI chip startup Etched emerges from stealth with Sohu, a Transformer-specific ASIC on TSMC N4P with 144GB HBM3E. By hardwiring attention mechanisms, it claims 20x throughput and 140x price-performance vs. H100 on Llama 70B. With $800M total funding and first racks shipping this summer, it directly challenges NVIDIA's inference dominance.
AWS and Google Open Custom AI Chips for External Sales, ASIC Shipment Growth Surpasses GPU, TCO Inflection Point Reached
In Q2 2026, AWS Trainium and Google TPU are commercialized externally for the first time. Custom ASIC shipment growth of 44.6% surpasses GPU's 16.1%. ASIC TCO advantage reaches 40-65% for large-scale inference; Midjourney cut monthly compute cost from $2.1M to $0.7M after migrating to TPU. This marks a structural inflection point in AI compute.
OpenAI and Broadcom launch Jalapeño inference ASIC: 9-month tapeout, 2027 mass production, targets GPU replacement
OpenAI and Broadcom unveil Jalapeño, a custom inference ASIC designed in 9 months using OpenAI's own LLMs. Early benchmarks show superior performance-per-watt vs. current GPUs. Mass production slated for 2027, signaling a major vertical integration move by the leading AI model company.
OpenAI and Broadcom Tape Out First Inference ASIC Jalapeño in 9 Months, Targeting NVIDIA Dominance
OpenAI and Broadcom unveil Jalapeño, their first custom inference ASIC, fabricated on TSMC 3nm and optimized for Transformer models. Targeting a 50% inference cost reduction, it taped out in 9 months and is slated for deployment in gigawatt-scale data centers by late 2026, marking OpenAI's strategic pivot to full-stack AI infrastructure and a direct challenge to NVIDIA's inference hegemony.
OpenAI and Broadcom unveil Jalapeño inference ASIC to bypass NVIDIA GPU dependency
OpenAI and Broadcom launch Jalapeño, a custom ASIC for LLM inference, achieving tape-out in 9 months. OpenAI designs architecture, Broadcom provides networking, Celestica handles integration. Planned for large-scale deployment by end-2026 with gigawatt-scale datacenters, aiming to cut inference costs and reduce NVIDIA dependency.
Huawei Unveils AI-Centric Network with Token Monetization, UCM Caching Breaks Long-Context Barriers
At MWC Shanghai 2026, Huawei unveiled an AI-native network architecture integrating service, network, and compute, shifting from traffic-centric to intelligence-centric operations. The Unified Cache Manager (UCM) extends KV cache to petabyte-scale external storage, achieving 372% token throughput gains on GLM-5.1 at 128K sequence lengths. Token monetization frameworks and agentic operations enable carriers to charge for AI inference capacity and personalize services.
OpenAI and Broadcom Unveil Jalapeno Inference ASIC, Reshaping AI Hardware Landscape
OpenAI, in collaboration with Broadcom, has developed Jalapeno, a custom LLM inference accelerator. The chip uses a multi-chip module with HBM3E memory and achieved tape-out in just nine months. Designed for OpenAI's model stack, it aims to reduce inference costs and dependency on NVIDIA GPUs, with initial deployment planned for late 2026.