Reports
AI-generated structured vendor updates
TSMC 2nm Volume Production Begins, AMD First to Launch Venice and MI455X
TSMC has fully ramped its 2nm process at five fabs, contributing ~3% of wafer revenue in Q2. AMD launches the first 2nm-based products: EPYC Venice (256 cores) and Instinct MI455X (320B transistors, 432GB HBM4), shipping in Q3. Samsung targets 1.4nm by 2029, Intel 18A introduces High-NA EUV, intensifying foundry competition.
Intel Accelerates 14A to 2027H2 Risk Production, 18A Yield Exceeds Target by 25%, Capex Raised to $20B
Intel announced 14A process acceleration to risk production in 2027H2 with HVM in 2028, 18A yield exceeding target by 25% supporting Panther Lake volume, and raising 2026 capex to $20B, signaling an aggressive foundry push. Advanced packaging EMIB-T becomes a profit pillar.
Microsoft Azure Deploys AMD Helios Rack with MI455X GPUs, Breaking NVIDIA's Cloud AI Monopoly
Microsoft Azure officially adopts AMD Helios rack-scale AI infrastructure, featuring 72 MI455X GPUs (432GB HBM4, 19.6TB/s), Venice EPYC CPUs, and Pensando DPUs. Three new instances (ND MI455X v7, HDv2, HXv2) are launched, marking Azure's shift from exclusive NVIDIA dependency to a multi-vendor AI strategy.
AMD Confirms Zen 6 EPYC Venice: First 2nm Server CPU Launching July 2026
AMD confirms Zen 6 EPYC Venice launch at Advancing AI 2026 (July 22-23). As the first 2nm server CPU, it features triple-core hybrid architecture, up to 192 cores, ~29% single-thread and ~22% multi-thread gains, targeting AI inference and tight CPU-GPU synergy via Infinity Fabric.
TSMC CoWoS Capacity to Reach 200k Wafers by 2027, Diversifying from GPU to CPU and ASIC
TSMC targets 200k wpm CoWoS capacity by 2027, narrowing supply-demand gap from 20% to 10%. Customer base diversifies from NVIDIA GPU to include AI server CPUs (MediaTek, AMD) and ASICs (Broadcom). CoPoS panel-level packaging enters pilot production in 2027.
AMD Zen 6 Venice 256-Core EPYC Claims 3.3x Rack Performance Over NVIDIA Vera, But Estimates Raise Questions
AMD unveils first estimated performance of Zen 6 Venice EPYC (2nm, 256 cores), claiming 3.3x rack-level integer throughput over NVIDIA Vera at 100kW total power. A direct counter to NVIDIA's Arm push, but based on projected estimates, not silicon.
Intel CEO: AI Inference Flips CPU/GPU Ratio, Multi-Agent Pushes CPU Back to Core
Intel CEO Lip-Bu Tan forecasts AI inference driving CPU/GPU ratio from 1:8 to 1:1 or even 4:1, with Multi-Agent demands (OS scheduling, KV Cache offload, high-concurrency tool calls) elevating CPU from supporting role to lead. NVIDIA Vera, AMD Venice, and Intel 18A CPU mass production confirm a CPU demand super-cycle.
NVIDIA Vera CPU Threatens x86: 1.5x Performance, 4x Density, Full-Stack AI Lock-In
Rumors indicate NVIDIA will unveil its first general-purpose CPU Vera at Computex 2026, claiming 1.5x x86 performance, 2x throughput, and 4x rack density. Shipment targets: 1.2M units in FY2027, 4.2M in FY2028. Vera targets the AI inference shift from 1:8 to 1:1 CPU/GPU ratio, complementing Grace to create a full GPU+CPU stack.