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10 Total Reports
TSMC Other 2026-07-28

TSMC 2nm Volume Production Begins, AMD First to Launch Venice and MI455X

TSMC has fully ramped its 2nm process at five fabs, contributing ~3% of wafer revenue in Q2. AMD launches the first 2nm-based products: EPYC Venice (256 cores) and Instinct MI455X (320B transistors, 432GB HBM4), shipping in Q3. Samsung targets 1.4nm by 2029, Intel 18A introduces High-NA EUV, intensifying foundry competition.

Intel Other 2026-06-23

Intel at Computex 2026: CPU as Agentic AI Orchestrator, x86 Reclaims Inference Control

At Computex 2026, Intel unveiled the 288-core Xeon 6+ (Intel 18A) and 3rd-gen Core Ultra, claiming Agentic AI shifts CPU:GPU ratio from 1:8 to 1:1. Partnering with SambaNova and Foxconn for rack-scale inference systems, Intel repositions the CPU as the orchestrator for multi-step AI reasoning, aiming to reclaim control from GPU-centric architectures.

Intel Other 2026-06-22

Intel Launches Xeon 6+ with 288 Cores, Reclaims AI Control Plane

Intel unveils Xeon 6+ (288 E-cores, 576MB L3, 18A process), Ethernet 800 E835 controller (200GbE), and next-gen GPU Crescent Island at Computex 2026. Partnerships with SambaNova and Foxconn for rack-scale AI. Strategy: Xeon as the control plane for Agentic AI.

Intel Other 2026-06-12

Google Awards 3M+ TPU Packaging Orders to Intel Foundry, Breaking TSMC's CoWoS Monopoly

Google has awarded Intel Foundry over 3 million units of next-gen TPU advanced packaging orders, leveraging Intel's EMIB technology with production starting in 2028. This marks Intel Foundry's largest external customer win and a pivotal shift in AI chip packaging away from TSMC's CoWoS monopoly.

AMD Other 2026-06-12

AMD Zen 6 Venice 256-Core EPYC Claims 3.3x Rack Performance Over NVIDIA Vera, But Estimates Raise Questions

AMD unveils first estimated performance of Zen 6 Venice EPYC (2nm, 256 cores), claiming 3.3x rack-level integer throughput over NVIDIA Vera at 100kW total power. A direct counter to NVIDIA's Arm push, but based on projected estimates, not silicon.

Intel Other 2026-06-02

Intel and SambaNova Launch Rack-Scale AI, CPU Reclaims Inference Control

At Computex 2026, Intel unveiled a rack-scale AI infrastructure combining Xeon 6+ processors with SambaNova SN-50 RDU, and a decoupled inference cloud (Vector Core Compute) using Xeon 6+ for orchestration, Blackwell GPU for prefill, and SN40 RDU for decode. This CPU-centric approach targets agentic AI inference, challenging NVIDIA's GPU dominance.

Intel Other 2026-05-25

Intel CEO: AI Inference Flips CPU/GPU Ratio, Multi-Agent Pushes CPU Back to Core

Intel CEO Lip-Bu Tan forecasts AI inference driving CPU/GPU ratio from 1:8 to 1:1 or even 4:1, with Multi-Agent demands (OS scheduling, KV Cache offload, high-concurrency tool calls) elevating CPU from supporting role to lead. NVIDIA Vera, AMD Venice, and Intel 18A CPU mass production confirm a CPU demand super-cycle.

Intel Other Medium Signal 2026-03-25

Intel Launches 18A Process Commercial PC Platform with Enhanced AI Inference

Intel launches Core Ultra 3 series commercial processors on 18A process, delivering 4x AI performance improvement. Arc Pro B70 GPU optimized for enterprise AI workloads outperforms competitors in context window and multi-user response. vPro platform deep integration with Intune enhances device management.

Intel Other 2025-06-02

Intel's 18A Xeon 6+ and Rack Scale AI: A CPU-Centric Challenge to NVIDIA's Inference Empire

At Computex 2026, Intel launched the 18A-node Xeon 6+ processor, the Rack Scale AI platform with SambaNova's SN-50 RDU, and a fully disaggregated inference service (Vector Core Compute). This CPU-centric hybrid architecture targets agentic AI inference workloads, directly challenging NVIDIA's Vera Rubin NVL72 and GPU-dominated ecosystem.

Intel Other 1970-01-01

Intel Lands Google TPU Package Order: Foundry Pivot Gains Traction, TSMC Still Core

Intel secured a multi-million unit order for Google TPU packaging using its EMIB-T technology, marking its largest external AI chip deal. However, analysts caution the order is primarily for packaging, not wafer fabrication, with TSMC retaining the core manufacturing role.