Reports
AI-generated structured vendor updates
Huawei unveils Atlas 950 SuperPoD: 1024-card memory-coherent AI supernode
Huawei unveiled the Atlas 950 SuperPoD at WAIC 2026, powered by the 950DT chip, supporting 1024 interconnected cards with 256TB unified memory addressing. Designed for trillion-parameter model training and Agentic AI inference, it marks a shift from chip-level stacking to system-level unified architecture.
Huawei Atlas 950 SuperPoD & 灵衢2.0: A Systemic Pivot in China's AI Compute from Chip to Cluster
At WAIC 2026, Huawei publicly demonstrated the Atlas 950 SuperPoD, a 1024-ascend NPU card cluster, and unveiled the 灵衢2.0 high-speed interconnect protocol. This signals a strategic shift in China's AI infrastructure from single-chip to system-level leadership, creating a closed-loop ecosystem that directly challenges NVIDIA's NVL series dominance.
Huawei Ascend 10K-Card Cluster Goes Live, UnifiedBus Protocol Pools All Resources
Huawei launched an Ascend 10,000-card AI cluster in Shaoguan, Guangdong, and showcased the Atlas 950 SuperPoD with its proprietary UnifiedBus interconnect supporting 8,192 NPUs at 16.3 PB/s. Huawei Cloud also entered the Gartner 2026 Cloud AI Infrastructure Leaders quadrant, reinforcing its push for a self-contained AI ecosystem.
Huawei and Hubei Mobile Validate AI Inference Acceleration: External KV Cache Boosts Throughput 372%
Huawei and Hubei Mobile completed the first operator AI inference acceleration trial, using OceanStor A800 storage and Ascend A3 supernode with UCM to externalize KV Cache to PB-level storage, achieving up to 372% TPS improvement for long-context inference on GLM-5.1 and MiniMax M2.5 models.
Huawei Ascend 910C Trains 1.6T-Parameter MoE Model: First Full Pipeline on Domestic AI Chips
Huawei, in collaboration with research institutes, completed full-parameter post-training of DeepSeek-V4-Pro (1.6 trillion parameters, MoE) on an Ascend 910C cluster. Key metrics: stable 1,500 steps on 1,000 cards, 30% compute utilization, 14% operator efficiency gain, zero reliance on foreign GPUs. This marks the first end-to-end trillion-parameter training loop on domestic chips.