Reports
AI-generated structured vendor updates
ASML EXE:5200 High-NA EUV: 8nm Resolution Locks 2nm Node, Cost Trap Looms
ASML launches the EXE:5200 High-NA EUV lithography system, boosting resolution from 13nm to 8nm and wafer throughput to 220 WPH, enabling 2nm and beyond. Intel is the first customer for its 18A process. ASML also reveals Hyper-NA (NA 0.85) development for sub-1nm nodes.
Huawei's Tao Law: LogicFolding Bypasses Lithography, 55% Density Gain on Fixed Node
At ISCAS 2026, Huawei's He Tingbo unveiled the Tao Law, replacing geometric scaling with temporal optimization targeting tau (characteristic time). LogicFolding vertically stacks active layers to shorten critical paths, achieving 55% transistor density increase and 41% energy efficiency gain on a fixed node. Kirin 2026 reaches 3.1GHz; Ascend series will adopt LogicFolding. The roadmap projects equivalent 1.4nm density by 2031, fundamentally challenging Moore's Law's lithography dependency.
TSMC Discloses 2nm and Beyond Technology Roadmap
TSMC announces its 2nm (N2) process will adopt GAAFET architecture replacing FinFET, with plans for subsequent A-series nodes. The technology targets performance and efficiency gains for HPC and mobile applications, leveraging new materials and 3D packaging for AI and 5G/6G demands.
ASML Advances Lithography Paradigm Shift Through Computational Patterning
ASML integrates EUV lithography with computational patterning techniques (OPC, SMO, Multi-Beam) to systematically optimize imaging chains and push k1 factor beyond physical limits. This represents a paradigm shift from hardware-driven advances to hardware-algorithm fusion, enabling more economical chip scaling.
ASML Unveils Lithography Accuracy Measurement Technology: The Key to Nanometer Control
ASML has published a technical article detailing the critical principles of "measuring accuracy" in its lithography technology. The article states that in chip manufacturing, lithography machines must transfer circuit patterns onto silicon wafers with extreme precision, and measurement is the foundation for achieving this accuracy. ASML ensures precision through its unique "alignment" and "overlay" measurement systems. The alignment system ensures precise alignment between the silicon wafer and the mask, while overlay measurement is used to assess the pattern registration accuracy between consecutive lithography layers, which is crucial for manufacturing complex 3D structures. ASML's technology can achieve sub-nanometer measurement accuracy, a core capability that continuously drives the miniaturization of chip processes (such as the evolution towards 3nm nodes and beyond). This technology is an indispensable part of ASML's advanced equipment like Extreme Ultraviolet (EUV) lithography machines, ensuring consistency and yield in mass production. **Comment**: By delving into its fundamental measurement technology, ASML once again highlights its technical moat in the semiconductor equipment field. Sub-nanometer measurement and control capabilities are the invisible cornerstone enabling the continuation of Moore's Law. For chip manufacturers and material/metrology equipment suppliers, paying attention to the evolution of such underlying precision technologies is key to anticipating the feasibility and challenges of advanced process node implementation.
ASML Explores Lithography Core Technology Path and Physical Limits
ASML details the core physical principle of lithography—Rayleigh criterion—revealing the resolution formula and optimization paths. Through EUV light sources, high-NA lenses, and computational lithography, it continuously pushes chip manufacturing limits.
ASML Details Core Role of EUV Lithography in Chip Manufacturing
ASML released a technical brief detailing the entire chip manufacturing process, emphasizing the critical role of EUV lithography. The technology enables precise patterning using 13.5nm extreme ultraviolet light, serving as a core driver for advanced logic chip production. The brief highlights the complex light source and optical systems essential for extending Moore's Law.